GaAs MESFETs (MEtal-Semiconductor Field Effect Transistors) are well established as microwave power devices at medium power levels. The amount of output power which can be produced by a given device is determined by the product of the maximum current the device can conduct and the maximum voltage the device can tolerate from drain to source without burning out. Because of other considerations including ohmic losses in the device and circuit which are proportional to the square of the device current, it is attractive to use larger supply voltages and less current to achieve a given power level. However, the supply voltage must be set low enough so that the maximum voltage present across the drain and source electrodes of the device is less than its burnout voltage by an acceptable margin.
In a typical power application, the active device operates with a "load line", implying that the maximum voltage appearing across the device decreases as the current through it increases. Accordingly, one may infer that a device with a lower burnout voltage under open-channel (high current) conditions than that under pinched off (low current) conditions is acceptable. However, a device with high burnout voltage at all current levels is desirable so that temporary transients or mismatch conditions will not make the device fail. For example, when the input and output impedance matching structures of a GaAs FET amplifier are empirically tuned to optimize amplifier performance, high mismatches in load impedances often occur. With a high mismatch, the microwave power being generated by the FET is not delivered to the load but instead, a high current flows across the FET. High mismatches also occur when other components or solder connections in an amplifier circuit fail, resulting in the high current condition. Abnormally high voltage and current conditions can also arise due to switching transients across inductive loads. Thus, meeting the objective of providing a high burnout voltage at all current levels was one factor which guided GaAs MESFET development historically.
Early GaAs MESFETs were "planar" devices, meaning that all three of the device electrodes--source, gate, and drain--were fabricated on one surface of the GaAs material. These devices could be made by a relatively simple fabrication process which was attractive for its low cost and ease of manufacturing. By the mid 1970's, it was found that adding inlaid n+ source and drain contact regions to such a planar device could increase the device's drain-source burnout voltage as well as decrease the device's parasitic resistances. Subsequently, it was found that such devices suffered from a serious limitation--the drain burnout voltage was much lower under open-channel conditions than it was when the device was pinched off. FIG. 1 shows a cross-sectional diagram of a such a planar prior art MESFET having inlaid n+ regions beneath its source and drain electrodes. Reference numeral 12 indicates the channel region, which is the region where avalanche breakdown has been assumed to occur historically. The region denoted by reference number 13, i.e., the area within the subchannel region 14 that adjoins the drain n+ region and is beneath the channel region 12, is another possible site for avalanche breakdown.
U.S. Pat. No. 4.956.308 discloses a method of making self-aligned field effect transistors having asymmetrical structures as opposed to forming symmetrical drain and source n+ regions on respective sides of the gate electrode. The inclusion of this asymmetrical structure results in lower parasitic source resistance without impacting other critical device parameters. However, this technique does not afford improved open-channel burn-out performance--only pinched-off burnout performance is improved.
Further improvement in burnout near pinch-off was obtained by forming the gate at the bottom of an etched trough or recess in the GaAs channel region which had the same lateral dimension as the gate. However, the open-channel burnout was not affected much by this modification. It was then discovered that the open-channel burnout voltage could be increased by using a wide recess (wider than the gate, as shown in FIG. 2).
Most modem GaAs power MESFETs are similar to FIG. 2. The gate recess (or multiple gate recesses) allow the burnout characteristics to be very good, but the resulting recessed-gate device is not as easy to manufacture as a planar device. On the other hand, conventional planar devices as exemplified by FIG. 1., which are desirable from a manufacturing standpoint, have the undesirable open-channel burnout characteristics.
It is therefore an object of the present invention to provide a field-effect transistor which overcomes the disadvantages of the prior art.
It is an additional object of the present invention to provide an enhanced planar MESFET having highly improved open-channel burnout characteristics and which preserves the manufacturing advantages of a planar device.
It is another object of the present invention to provide a device structure in which a selectively doped guard region is present between the drain n+ region and the remainder of the device.
It is yet another object of the present invention to provide a method of producing field-effect transistors in which the open-channel burnout voltage is increased without an adverse effect on the device's microwave performance characteristics.